ANI
16 Sep 2025, 18:07 GMT+10
Taipei [Taiwan], September 16 (ANI): MediaTek Inc., Taiwan's largest chip designer, said Tuesday that it has adopted Taiwan Semiconductor Manufacturing Co.'s (TSMC) advanced 2-nanometer process -- set to enter mass production in the second half of this year -- to build its next flagship system on a chip (SoC), Focus Taiwan reported.
The SoC has completed the tape-out stage, in which the final design is sent for manufacturing preparation, and is expected to be available at the end of 2026, MediaTek said in a statement, as per the news report.
Although the company did not reveal the chip's name, international media reported it could be the Dimensity 9600, MediaTek's next-generation mobile flagship, as part of its push to strengthen its global position in cutting-edge semiconductor technologies.
MediaTek President Joe Chen said the company's partnership with TSMC has enabled its flagship chips to deliver high efficiency and provide solutions across products ranging from edge applications to cloud services, the Focus Taiwan report said.
According to the company, MediaTek and TSMC have long collaborated on mobile platforms, computing, automotive electronics and data centers. The new SoC highlights the strength of their relationship, it said.
Kevin Zhang, TSMC's deputy co-COO and senior vice president of business development and global sales, said the 2nm process marks TSMC's entry into nanosheet transistor structures, underscoring its commitment to meeting client demand by upgrading technologies and enhancing computing performance and energy efficiency.
Zhang added that the partnership with MediaTek reflects TSMC's ambition to support a broad range of applications.
MediaTek is among several companies adopting TSMC's 2nm node. Other prominent clients -- including Apple Inc., Nvidia Inc. and Advanced Micro Devices Inc. (AMD) -- are also expected to release products built with the technology.
TSMC said on its website that the 2nm process will be the world's most advanced in density and energy efficiency, offering full-node improvements in both performance and power consumption. (ANI)
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